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Efficient Construction of Pipelined Multibit-Trie Router-Tables

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2 Author(s)
Kun Suk Kim ; Digital Media Res. Lab., LG Electron. Inc., Seoul ; Sahni, S.

Efficient algorithms to construct multibit tries suitable for pipelined router-table applications are developed. We first enhance the 1-phase algorithm of Basu and Narlikar, obtaining a 1-phase algorithm that is 2.5 to 3 times as fast. Next, we develop 2-phase algorithms that not only guarantee to minimize the maximum per-stage memory but also guarantee to use the least total memory subject to the former constraint. Our 2-phase algorithms not only generate better pipelined trees than those generated by the 1-phase algorithm, but they also take much less time. A node pull-up scheme that guarantees no increase in maximum per-stage memory as well as a partitioning heuristic that generates pipelined multibit tries requiring less maximum per-stage memory than required by the tries obtained using the 1-phase and 2-phase algorithms are also proposed

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Computers, IEEE Transactions on  (Volume:56 ,  Issue: 1 )