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Today's consumer electronics must be portable, reliable at various operating environments, and power efficient. Thus, semiconductor manufacturers constantly upgrade their production technologies and incorporate intelligent circuit design techniques. With widespread advances in system integration techniques, manufacturers can bundle multiple functionalities onto a single chip, reducing the end product's form factor. However, with higher levels of integration and reduced pin count, test issues are becoming more critical. During high-volume production, variations in process parameters cause devices to vary significantly from their performance metrics, and test engineers have only limited test resources to perform at-speed testing. Generating diagnosis information is also challenging during product ramp-up, as very little information is available from the output pins about the different modules' functionalities. DFT seems to be the only viable solution in such a scenario. DFT can address various issues related to at-speed testing and high-speed test response capture by performing signal conditioning to more easily capture information at lower speeds. The authors present a method that uses embedded DC sensors at test observation nodes to simplify data capture and enhance test quality while performing at-speed tests during production testing. Experiments show that monitoring sensor outputs provides a very good estimate of complex, system-level specifications.