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Embedded Source/Drain SiGe Stressor Devices on SOI: Integrations, Performance, and Analyses

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3 Author(s)
Da Zhang ; Technol. Solutions Organ., Freescale Semicond., Austin, TX ; White, Ted ; Nguyen, Bich-yen

A detailed investigation of embedded source/drain SiGe stressors (eSiGes) on a silicon-on-insulator substrate for pMOS performance enhancement is presented. It is found that the integration with undoped SiGe epitaxy suffers strain relaxation from a postepitaxy implantation. SiGe growth with in situ doping is able to retain high strain for carrier mobility enhancement. For doped eSiGe integration with a proper thermal sequence, 20% pMOS drive current improvement is demonstrated. Quantitative analyses of contributions from mobility enhancement and device exterior resistance reduction to the performance improvement are also discussed

Published in:

Electron Devices, IEEE Transactions on  (Volume:53 ,  Issue: 12 )

Date of Publication:

Dec. 2006

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