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DC-20 GHz CMOS LNA using novel multilayered transmission lines and inductors

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3 Author(s)
Chirala, M.K. ; Dept. of Electr. & Comput. Eng., Texas A&M Univ., TX ; Guan, X. ; Nguyen, C.

A distributed low-noise amplifier (LNA) employing novel multilayered transmission lines and inductors is designed in a standard 0.18 mum CMOS process. The new LNA provides significant improvement in performance and size with less than 13 dB return loss from DC to 17 GHz, average gain of 8plusmn0.2 dB from DC to 20 GHz, noise figure of 3.4-5 dB from 0.5-19 GHz, power consumption of 34.2 mW, and 1.05times0.37 mm 2 chip size including RF pads

Published in:

Electronics Letters  (Volume:42 ,  Issue: 22 )