A Reconfigurable 0.18-μm CMOS Equalizer IC with an Improved Tunable Delay-Line for 10-Gb/sec Backplane Serial I/O Links

In this paper, a reconfigurable CMOS equalizer is presented to accommodate vast variety of backplane channel loss characteristics. Backplane channels over different trace lengths and dielectric materials were measured and characterized. Feed-forward equalizer (FFE) topology with finite impulse response (FIR) architecture was chosen for optimal equalization for the corresponding backplane configurations. For a reconfigurable FFE IC implementation, wide-range tunable delay-line (15-ps ~ 74-ps) and variable tap-gain amplifier were fabricated in a 0.18-mum standard CMOS technology. The proposed reconfigurable FFE demonstrated successful equalization at 10Gb/sec over various channel configurations with 26mW power dissipation from a 1.8-V supply