Referenced Items are not available for this document.
A high-performance self-routing switch architecture, based on a multistage interconnection network, is proposed for asynchronous transfer mode (ATM) switching systems. It makes use of the principle of error-prevention routing. The switch performance is studied under uniform traffic and full load conditions. The switch is shown to achieve high throughput and low cell loss probability using a smaller number of stages when compared to previously reported results. The number of stages needed to achieve a certain cell loss probability is also shown to be linear with logN
Published in:
Communications, 1993. ICC '93 Geneva. Technical Program, Conference Record, IEEE International Conference on
(Volume:2
)
Date of Conference: 23-26 May 1993
- Page(s):
- 696 - 700 vol.2
- Meeting Date :
- 23 May 1993-26 May 1993
- Print ISBN:
- 0-7803-0950-2
- INSPEC Accession Number:
- 4932931
- Conference Location :
- Geneva
- Digital Object Identifier :
- 10.1109/ICC.1993.397364
- Product Type:
- Conference Publications
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