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Mega bit CMOS SRAM chip failure analysis using external electrical testing and internal contactless laser beam testing

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2 Author(s)
Rayapati, V.N. ; Dept. of Electr. Eng., Ecole Polytech. de Montreal, Que., Canada ; Kaminska, B.

A powerful failure analysis method for mega bit CMOS SRAM chip presented in this paper, is very useful in the CAD environment. The SRAM chip functional test allows the detection of permanent/intermittent faults which could cause the SRAM chip to function incorrectly. These faults are stuck-at-1 or stuck-at-0 based on physical failures like metallization shorts and capacitive coupling. Then, a laser beam, integrated in an automatic test equipment, provides an accurate localization of SRAM chip failures using memory chip layout. This paper demonstrates that the association of an electrical tester and an internal contactless laser beam tester makes easier the localization of failures in the SRAM chip and consequently reduces the test cost

Published in:

Memory Technology, Design and Testing, 1994., Records of the IEEE International Workshop on

Date of Conference:

8-9 Aug 1994