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Design of an active memory system for network applications

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3 Author(s)
Asthana, A. ; AT&T Bell Labs., Murray Hill, NJ, USA ; Cravatts, M. ; Krzyzanowski, P.

We describe an active memory named SWIM (Structured Wafer-based Intelligent Memory), designed for efficient storage and manipulation of data structures. The key architectural idea in SWIM is to put some processing logic inside each memory chip that allows it to perform data manipulation operations locally and to interact with a disk or a communication line through a backend port. A network or I/O subsystem is built using an interconnected ensemble of such memory logic pairs. A complex network processing task can now be distributed between a large number of small memory processors each doing a sub-task, while still retaining a transparent memory interface. We argue that active memory based processing enables more powerful, scalable and robust designs for storage and communications subsystems, that can support emerging network services, multimedia workstations and wireless PCS systems. A complete parallel hardware and software system constructed using an array of SWIM elements has been operational for over a year

Published in:

Memory Technology, Design and Testing, 1994., Records of the IEEE International Workshop on

Date of Conference:

8-9 Aug 1994

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