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Fast functional simulation: an incremental approach

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3 Author(s)
Hwang, S.Y. ; Dept. of Electr. Eng., Stanford Univ., CA, USA ; Blank, T. ; Choi, K.

In an effort to speed up simulation, a novel algorithm,, called incremental simulation evaluates the circuit components that can be affected directly or indirectly by design changes, utilizing the information generated during the previous simulation to reduce the number of component evaluations to a minimum. The authors describe the design and implementation of the incremental algorithm for logic or functional simulation, which substantially improves the run-time performance over existing simulators by using the incremental property of the hardware design process

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:7 ,  Issue: 7 )