Referenced Items are not available for this document.
The circuit throughput of a logic channel in some high-speed applications is limited by the quality of the transition edge. One important limitation to this quality comes from jitter, especially that arising from signal history. The cause of this type of jitter is discussed, and its accumulation is explored. Some jitter reduction techniques are analyzed
Published in:
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on
Date of Conference: 3-6 May 1993
- Page(s):
- 2114 - 2117 vol.3
- Meeting Date :
- 03 May 1993-06 May 1993
- Print ISBN:
- 0-7803-1281-3
- INSPEC Accession Number:
- 4997044
- Conference Location :
- Chicago, IL
- Digital Object Identifier :
- 10.1109/ISCAS.1993.394174
- Product Type:
- Conference Publications
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