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High performance graphics on a SIMD linear processor array

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4 Author(s)
Letellier, L. ; LETI DEIN, Gif sur Yvette, France ; Juvin, D. ; Rebillat, J. ; Basille, J.-L.

The specific features of a single instruction, multiple data (SIMD) parallel architecture applied to graphics through line drawing algorithms are discussed. This cost-effective graphics accelerator represents an alternative to dedicated hardware. The main features of the SYMPAT12 system are presented. The line drawing methods validated on the calculator as well as their performances are described. The results demonstrate the validity of this architecture applied to graphics

Published in:

Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on

Date of Conference:

3-6 May 1993