Cart (Loading....) | Create Account
Close category search window
 

VLSI implementation of an associative memory using temporal relations

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Ali, H.H. ; Dept. of Electr. Eng. & Comput. Sci., George Washington Univ., Washington, DC, USA ; Zaghloul, M.E.

A mixed digital analog approach is presented for VLSI implementation of an associative memory model using temporal relations. The proposed model is based on the biological model of the cortex. There are two motivations for this research. First, the analog and parallel nature of the neural network approach may provide an efficient technique to achieve the high speed requirement for real-time coding systems with less hardware than both digital techniques and adaptive neural techniques. Second, the model proposed, based on the biological neural network, may be useful as a model of the information processing in the human brain. The proposed circuit realizing such a theory is faster, smaller in area, and more efficient than current systems

Published in:

Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on

Date of Conference:

3-6 May 1993

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.