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Browse Conference Publications > Circuits and Systems, 1993., ... Help

Efficient test vectors for ISCAS sequential benchmark circuits

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2 Author(s)
Lee, S.Y. ; Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA ; Saluja, K.K.

The sequential automatic test pattern generation system FASTEST is implemented with new heuristics to produce efficient test vectors for sequential circuits. The efficiency of FASTEST in terms of the quality of test vectors is demonstrated. The test vectors provide excellent fault coverage by fairly short test sequences. The profile of the ISCAS benchmark circuits is also described

Published in:
Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on

Date of Conference: 3-6 May 1993

Page(s):
1511 - 1514 vol.3
Meeting Date :
03 May 1993-06 May 1993
Print ISBN:
0-7803-1281-3
INSPEC Accession Number:
4991484
Conference Location :
Chicago, IL
Digital Object Identifier :
10.1109/ISCAS.1993.394022

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