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A model for VLSI implementation of CNN image processing chips using current-mode techniques

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5 Author(s)
Espejo, S. ; Dept. of Analog Circuit Design, Seville Univ., Spain ; RodriguezVazquez, A. ; DominguezCastro, R. ; Linares, B.
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A new cellular neural network model is proposed. It allows simpler and faster VLSI implementation than previous models. Current-mode building blocks are presented for the design of CMOS image preprocessing chips (feature extraction, noise filtering, compound component detection, etc.) using the cellular neural network paradigm. Area evaluation for the new model shows a reduction of about 50% as compared to the use of current-mode techniques with conventional models. Experimental measurements of CMOS prototypes designed in a 1.6-μm n-well double-metal single-poly technology are reported

Published in:

Circuits and Systems, 1993., ISCAS '93, 1993 IEEE International Symposium on

Date of Conference:

3-6 May 1993