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Automatic parameter extraction system with process failure diagnostics for CMOS process

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2 Author(s)
Pieczynski, J. ; Fraunhofer Inst. for Microelectron. Circuits & Syst., Duisburg, West Germany ; Vogt, H.

An automatic system for process and device parameter extraction and failure analysis in CMOS processes is presented. The system checks in a short space of time whether the product parameters are within the specified tolerances. If not, the diagnostic part of the program searches for the cause of the failure. Compared to the standard test systems, this system offers the following advantages: (1) the product for which all key parameters lie within specified limits can be immediately identified; (2) the time needed for additional measurements of problem parameters can be minimized; (3) the source of the failure can be quickly found (in most cases); and (4) decision errors (product dispositioning, diagnostics) resulting from time-shortage or absence of specialized test engineers can be avoided.

Published in:
Microelectronic Test Structures, 1989. ICMTS 1989. Proceedings of the 1989 International Conference on

Date of Conference: 13-14 March 1989

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