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Efficient VLSI architecture for lossless data compression

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3 Author(s)
Kim, Y.-J. ; Dept. of Electron. Eng., Seoul Nat. Univ., South Korea ; Kim, K.-S. ; Choi, K.-Y.

An architecture for LZ1-type lossless data compression is described. The architecture is area efficient and fast. Since it exploits the locality of substring match lengths. The property has been shown experimentally for various data and buffer lengths. And an architecture based on it has been designed

Published in:

Electronics Letters  (Volume:31 ,  Issue: 13 )