Referenced Items are not available for this document.
A 1.1 V full switching high speed, low power BiCMOS logic circuit is presented. It consists of nine devices and uses a noncomplementary BiCMOS process. Bootstrapping and partial charge removal techniques are employed. HSPICE simulations have shown that the new circuit outperforms both CMOS and a recently reported circuit in terms of speed and power-delay product. An analytical expression relating the pull-up delay with its device parameters is also derived
Published in:
Electronics Letters
(Volume:31
,
Issue:
13
)
Date of Publication: 22 Jun 1995
- Page(s):
- 1039 - 1041
- ISSN :
- 0013-5194
- INSPEC Accession Number:
- 5006701
- Digital Object Identifier :
- 10.1049/el:19950714
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- 22 Jun 1995
- Sponsored by :
- Institution of Engineering and Technology
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