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A 64×64-pixel image sensor with full-frame analog memory and on-chip motion processor is presented. The processor consists of a charge amplifier and an analog subtractor. It uses the switched-capacitor technique and calculates the difference between the values of the signal on each pixel in successive frames. The rate can achieve up to 60 frames/s with limited area and power overhead. The analog memory required for the storage of the previous frame is implemented using implanted capacitors placed within the sensor array. Fabricated in a 1.2-μm standard CMOS process with an added metal 3 light-shielding layer, the circuit is fully functional and requires a total core area of 13 mm2
Published in:
Solid-State Circuits, IEEE Journal of
(Volume:30
,
Issue:
7
)
Date of Publication: Jul 1995
- Page(s):
- 800 - 806
- ISSN :
- 0018-9200
- INSPEC Accession Number:
- 5029531
- Digital Object Identifier :
- 10.1109/4.391119
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Jul 1995
- Sponsored by :
- IEEE Solid-State Circuits Society
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