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Design of concurrent error-detecting systolic arrays using |g 3N|M codes

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2 Author(s)
J. L. Olivier ; Dept. of Electr. Eng., Ohio State Univ., Columbus, OH, USA ; F. Ozguner

The problem of detection and identification of a faulty processing element in a systolic array is addressed. A method for designing processing elements with concurrent error detection is presented. The | gAN|M code is shown to be an effective code for encoding the operands in a systolic array. It is shown that the |g 3N|M code is equivalent to a residue code with the check and information bits interchanged, for an odd number of information bits. This allows arithmetic to be performed separately on the information and check bits while the output can be checked by an AN checker. An architecture and rules for designing a self-checking processing element (PE) for systolic arrays are presented. Both redundancy and extra delay of the self-checking PE are shown to be low

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:8 ,  Issue: 10 )