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Design and performance evaluation of an expendable modular directory scheme for maintaining cache coherency in multiprocessor systems

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2 Author(s)
Ososanya, E.T. ; Dept. of Electr. Eng., Tennessee Technol. Univ., Cookeville, TN, USA ; Matthews, D., Jr.

In multiprocessor systems with private caches, inconsistencies between blocks contained within separate catches can occur. A scheme must be devised to eliminate data inconsistencies and maintain coherency within the caches. One category of schemes for cache coherency involves using directories as an information system for the caches. In most cases the caches rely on signals from the directory as to when it can complete its operation. This paper presents a hardware based directory-arbitrator approach to the cache coherence problem. The arbitrator design is expandable and will allow parallel configuration of the directory chips to increase the number of caches that can be supported

Published in:

System Theory, 1995., Proceedings of the Twenty-Seventh Southeastern Symposium on

Date of Conference:

12-14 Mar 1995