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A real-time adaptive lattice predictor using a digital signal processor chip

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4 Author(s)
Sung-Hwan Kim ; Dept. of Electron. Eng., Seoul City Univ., South Korea ; Kri-Kyong Hong ; Young-Hwan Choi ; Woan-Hue Hong

A real-time adaptive lattice predictor was implemented using a digital signal processing chip. The implementation comprises input-output units, a central processing and control unit, and supporting software. The performance of the hardware was verified by comparing an input signal and the one-step prediction signal calculated by the predictor. The maximum operating frequency for the four-stage lattice structure was 13.5 kHz

Published in:

Instrumentation and Measurement, IEEE Transactions on  (Volume:38 ,  Issue: 5 )

Date of Publication:

Oct 1989

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