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Analysis of an output-buffered ATM switch with speed-up constraints under correlated and imbalanced bursty traffic

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3 Author(s)
Makhamreh, I.I. ; Dept. of Electr. Eng., Univ. of Sci. & Technol., Irbid, Jordan ; Georganas, N.D. ; McDonald, D.

The authors consider a discrete-time model of an access ATM switch with output buffers. A switch with output queueing has an optimum performance; however, it requires a switch fabric with speed N. However, the switch fabric may operate at L<N times the speed of the input/output links. The random traffic assumption underestimates the buffer size. Each input port of the switch is assumed to be driven by an interrupted Bernoulli process and every cell in a burst is directed to the same output port. An efficient aggregation method is applied for the performance analysis of the switch. The results prove to be very good

Published in:

Communications, IEE Proceedings-  (Volume:142 ,  Issue: 2 )