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A distributed transaction facility for design task management

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2 Author(s)
Tzi-cker Chiuch ; Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA, USA ; R. H. Katz

The authors describe the design task model and its prototypical implementation on Sprite. The design task manager can exploit the process-level parallelism within a task by running independent steps in parallel on a network of workstations. The authors present the mechanisms through which the task manager implements parallelism extraction, remigration, and atomicity guarantees. The task manager also records the operation history of an individual task. When a task is completed, its history record is passed to the activity manager of Papyrus, a design process manager developed in Berkeley

Published in:

Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on

Date of Conference:

22-25 Feb 1993