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High-level synthesis of asynchronous systems: Scheduling and process synchronization

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2 Author(s)
Badia, R.M. ; Dept. of Comput. Archit., Polytech. Univ. of Catalonia, Barcelona, Spain ; Cortadella, J.

Basic concepts for scheduling algorithms and control synthesis in high-level synthesis of asynchronous circuits are defined. Two scheduling strategies are presented and evaluated. Experiments on different benchmarks show that efficient asynchronous schedules can be obtained. Control is modeled in a distributed fashion with local controllers synchronizing between them by means of handshaking protocols

Published in:

Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on

Date of Conference:

22-25 Feb 1993