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A high density datapath compiler mixing random logic with optimized blocks

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2 Author(s)
Ammar, L.B. ; Lab. MASI CA ; Greiner, A.

A datapath compiler providing high transistor density is described. A designer can mix random logic with optimized blocks in the same bit-sliced structure thanks to a dedicated datapath library. Automatic placement is performed according to the structural input description. Minimized cost functions are total wire length and track density. Track assignment, dealing with virtual terminals, uses a divide and conquer approach to perform efficient over-cell routing. In order to provide process-independence, a symbolic layout approach is used. This tool has been successfully used to design several high performance datapaths

Published in:

Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on

Date of Conference:

22-25 Feb 1993

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