ASIC implementation of complex image processing algorithms using silicon compilation techniques [for biomedical application]

The design of an ASIC realizing an image processing algorithm as part of a biomedical application is described. The Cathedral-II silicon compiler has been used to specify and simulate the behavior and to synthesize a hardware implementation. The high-level optimization tasks that were repaired by the performance specifications are discussed. New optimizations are introduced and the interaction of different optimization tasks are highlighted.<
>