Referenced Items are not available for this document.
Future applications, will require higher I/O counts, more densification, lower cost, and greater performance. This paper demonstrates why area-array based chip-to-substrate and substrate-to-card interconnections are strategic, particularly solder bump flip chips (SBFC or C-4) and ceramic ball or column grid arrays (CBGA/CCGA), respectively. That is, SBFC are capable of high pin counts coupled with high yields, performance, and reliability. Moreover, recently introduced CBGA/CCGA interconnections provide substantial benefits over standard pin grid array (PGA) packages. Also, CBGA/CCGA packages possess the highest density achievable at the card level when utilized in conjunction with SBFC-mounted die
Published in:
Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on
(Volume:18
,
Issue:
2
)
Date of Publication: May 1995
- Page(s):
- 250 - 256
- ISSN :
- 1070-9894
- INSPEC Accession Number:
- 4967903
- Digital Object Identifier :
- 10.1109/96.386257
- Product Type:
- Journals & Magazines
- Date of Current Version :
- 06 August 2002
- Issue Date :
- May 1995
- Sponsored by :
- IEEE Components, Packaging, and Manufacturing Technology Society
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