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Background memory area estimation for multidimensional signal processing systems

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3 Author(s)
F. Balasa ; IMEC, Leuven, Belgium ; F. Catthoor ; Hugo De Man

Memory cost is responsible for a large amount of the chip and/or board area of customized video and image processing system realizations. In this paper, we present a novel technique-founded on data-flow analysis which allows one to address the problem of background memory size evaluation for a given nonprocedural algorithm specification, operating on multidimensional signals with affine indexes. Most of the target applications are characterized by a huge number of signals, so a new polyhedral data-flow model operating on groups of scalar signals is proposed. These groups are obtained by a novel analytical partitioning technique, allowing to select a desired granularity, depending on the application complexity. The method incorporates a way to tradeoff memory size with computational and controller complexity.<>

Published in:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems  (Volume:3 ,  Issue: 2 )