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Circuit-level dictionaries of CMOS bridging faults

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4 Author(s)
Lee, T. ; Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA ; Chuang, W. ; Hajj, I.N. ; Fuchs, W.K.

The contribution of this paper on the diagnosis (fault location) of CMOS bridging faults is threefold: First, the traditional fault dictionary (referred to as the full dictionary in this paper) is evaluated at the circuit level using a mixed-mode fault simulator. The fault set consists of randomly-generated gate input/output bridging faults. By using mixed-mode gate- and electrical-level detection methods, good diagnostic capability is achieved using only gate-level generated test sets. Second, we evaluate two reduced fault dictionaries, the pass/fail dictionary and the count dictionary. Finally, the effectiveness of IDDQ for diagnosis is examined. The results show that IDDQ, combined with the proposed voltage detection methods, achieves the highest diagnostic performance, with nearly complete diagnosis

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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:14 ,  Issue: 5 )