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Evaluation of sequential-in-random-out memory device

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3 Author(s)
Chang, C.-Y. ; Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan ; Hou, T.-W. ; Shieh, C.-K.

The buffering of data is a potential bottleneck to performance. In general, the buffer can be implemented either by FIFO or dual-port RAM, which are both two-port memory devices. The authors propose a classification of buffers. According to the classification, a new two-port memory device with the sequential-in-random-out feature is introduced. Simulation results show that 45% time, at most, could be saved, as compared to a FIFO buffer

Published in:

Electronics Letters  (Volume:31 ,  Issue: 8 )