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MICA: a mapped interconnection-cached architecture

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2 Author(s)
Yuh-Dauh Lyuu ; NEC Res. Inst., Princeton, NJ, USA ; Schenfeld, E.

MICA (Mapped Interconnection-Cached Architecture) is a novel architecture combining large reconfigurable networks and small, fast on-line routing, crossbar switches. It offers a good match for parallel applications exhibiting switching locality. Switching locality means that the need to “switch” or route the information to or from each PE is limited to a small set of sources or destinations. A parallel programming paradigm to attempt and minimize the movement of information by reconfiguring the relative proximity of the PEs is introduced. We aim to complete most communication requests with only two levels of routing decisions among a small set of channels. Multi-hop routing is not used as often, resulting in better performance

Published in:

Frontiers of Massively Parallel Computation, 1995. Proceedings. Frontiers '95., Fifth Symposium on the

Date of Conference:

6-9 Feb 1995

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