By Topic

A moment method for statistical analysis of high speed VLSI interconnects

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Li, L.L. ; Dept. of Electron., Carleton Univ., Ottawa, Ont., Canada ; Zhang, Q.J. ; Nakhla, M.

Statistical analysis of VLSI interconnects is important in manufacturability-driven design of printed circuit boards (PCB) and multichip modules (MCM). Conventional Monte-Carlo method for such an analysis requires highly repetitive circuit simulations and is computationally intensive. This paper presents an alternative approach for statistical analysis. An analytical and explicit relationship between the statistics of the circuit output and that of circuit parameters is derived. It is based on statistical moment theory and does not require Monte-Carlo analysis. The approach is suitable for fast estimation of network statistical performances and is confirmed by examples for VLSI interconnect delay and ground noise analysis

Published in:

Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994

Date of Conference:

1-4 May 1994