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Interconnect design using convex optimization

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2 Author(s)
P. K. Sancheti ; Dept. of Electr. Eng. & Comput. Eng., Iowa State Univ., Ames, IA, USA ; S. S. Sapatnekar

Two wire sizing formulations for optimizing interconnect are presented. The first minimizes the delay under wire width constraints, while the second minimizes the wiring area under delay and width constraints. A convex programming formulation is proposed, and an efficient algorithm is used to perform the optimization. Experimental results show that the first formulation, which has been the prevalent one in the literature, provides bad engineering solutions, and that the second formulation leads to significantly better results

Published in:

Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994

Date of Conference:

1-4 May 1994