By Topic

Design and optimization of high voltage analog and digital circuits built in a standard 5 V CMOS technology

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
H. Ballan ; Electron. Lab., Swiss Federal Inst. of Technol., Lausanne, Switzerland ; M. Declercq ; F. Krummenacher

This paper presents a new family of high-voltage (HV) analog and digital circuits which are fully compatible with a standard 5 V CMOS technology, without any process change. On the basis of several circuits, it is shown that HV design can be classified in three categories, for which a common design methodology can be identified. Detailed circuit sizing as well as measurements illustrate the performance achieved with this technique

Published in:

Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994

Date of Conference:

1-4 May 1994