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Circuit partitioning under capacity and I/O constraints

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2 Author(s)
Shih, M. ; Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA ; Kuh, E.S.

This paper proposes an effective method for solving multi-way circuit partitioning problems under capacity (size) and I/O pin count constraints. The objective is the total net cuts among partitions. We first linearize the quadratic objective function into a linear function, then we assign circuit components sequentially according to this linear function while avoiding capacity or I/O violations. The resulting assignment (partitioning) is used to compute another linear cost function and the sequential assignment is repeated. This process can be iterated for a fix number of times to get a good final solution. Experimental results for several benchmark circuits are also given to demonstrate its effectiveness

Published in:

Custom Integrated Circuits Conference, 1994., Proceedings of the IEEE 1994

Date of Conference:

1-4 May 1994

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