Referenced Items are not available for this document.
The effect of a replica-amp gain enhancement technique on the settling time of a two-stage op-amp is analyzed. It is found that since the added poles and zeros are comparable to the closed-loop bandwidth, there is only a small effect on the settling time. This analytical result is confirmed by both SPICE simulation and test-chip measurements
Published in:
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
(Volume:42
,
Issue:
3
)
Date of Publication: Mar 1995
- Page(s):
- 137 - 142
- ISSN :
- 1057-7130
- INSPEC Accession Number:
- 4937830
- Digital Object Identifier :
- 10.1109/82.372863
- Date of Current Version :
- 06 August 2002
- Issue Date :
- Mar 1995
- Sponsored by :
- IEEE Circuits and Systems Society
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