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Image processing applications using a novel parallel computing machine based on reconfigurable logic

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4 Author(s)
N. M. Allinson ; Dept. of Electron., York Univ., UK ; N. J. Howard ; A. R. Kolcz ; A. M. Tyrrell

Zelig is a 32 physical node fine-grained computer employing field-programmable gate arrays. Its application to the high speed implementation of various image pre-processing operations (in particular binary morphology) is described together with typical speed-up results

Published in:

Parallel Architectures for Image Processing, IEE Colloquium on

Date of Conference:

1994