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Self-aligned complementary bipolar technology for low-power dissipation and ultra-high-speed LSIs

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7 Author(s)
Onai, T. ; Central Res. Lab., Hitachi Ltd., Tokyo, Japan ; Ohue, E. ; Idei, Y. ; Tanabe, M.
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Fully symmetrical complementary bipolar transistors for low power-dissipation and ultra-high-speed LSIs have been integrated in the same chip using a 0.3-μm SPOTEC process. Reducing the surface concentration of the boron by oxidation at the surface of the boron diffusion layer suppressed the upward diffusion of boron from the subcollector of the pnp transistor during epitaxial growth. This enabled thin epitaxial layer growth for both npn and pnp transistors simultaneously. Cutoff frequencies of 30 and 32 GHz were obtained in npn and pnp transistors, respectively. Simulated results showed that the power dissipation is reduced to 1/5 in a complementary active pull-down circuit compared with an ECL circuit

Published in:

Electron Devices, IEEE Transactions on  (Volume:42 ,  Issue: 3 )

Date of Publication:

Mar 1995

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