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An efficient logical fault diagnosis for combinational circuits using stuck-at fault simulation

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1 Author(s)
Shimino, T. ; Comput. Div., NEC Corp.

A new efficient method to diagnose faults in a gate or function block is proposed. This method can localize a single logic function fault, which is caused by internal stuck-at, short or open faults in the gate or function block, by using stuck-at fault simulation. Since a practical fault diagnostic system is now under development the effectiveness of the method is demonstrated by experimental results on the ISCAS'85 benchmark circuits

Published in:

Test Symposium, 1994., Proceedings of the Third Asian

Date of Conference:

15-17 Nov 1994