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Optimal wiresizing under Elmore delay model

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2 Author(s)
Cong, J.J. ; Dept. of Comput. Sci., California Univ., Los Angeles, CA, USA ; Kwok-Shing Leung

In this paper, we study the optimal wiresizing problem under the Elmore delay model. We show that the optimal wiresizing solutions satisfy a number of interesting properties, including the separability, the monotone property, and the dominance property. Based on these properties, we have developed a polynomial-time optimal wiresizing algorithm for arbitrary interconnect tree structures under Elmore delay model. Extensive experimental results have shown that our wiresizing solution reduces interconnect delay by up to 51% when compared to the uniform-width solution of the same routing topology. Furthermore, compared to the wiresizing solution based on a simpler RC delay model our wiresizing solution reduces the total wiring area by up to 28% while further reducing the interconnect delays to the timing-critical sinks by up to 12%

Published in:

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  (Volume:14 ,  Issue: 3 )