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Device performance of shallow junction PMOSFETs fabricated using low-energy ion implantation of B and BF2 into crystalline and Ge preamorphised silicon

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5 Author(s)
Hong, S.N. ; Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA ; Ruggles, G.A. ; Paulos, J.J. ; Wortman, J.J.
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P-channel MOSFETs with source/drain junction depths less than 0.1 mu m were fabricated using 1.35 keV B+ and 6 keV BF2+ implantation into crystalline and Ge preamorphised silicon. For 950-1050 degrees C, 10 s rapid thermal annealing, the various implantation conditions yielded similar device characteristics. The implantation of BF2+ resulted in a slight increase in the specific contact resistivity to source and drain over that obtained using B+. Measurements of subthreshold I/V characteristics and the channel length dependence of threshold voltage indicated that good long-channel behaviour was obtained for 0.7 mu m channel length devices.

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Electronics Letters  (Volume:25 ,  Issue: 16 )