By Topic

Improving parallel execution performance for logic programs using mode information

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Tsai, J.J.P. ; Dept. of Electr. Eng. & Comput. Sci., Illinois Univ., Chicago, IL, USA ; Bing Li

Parallel execution of a logic program is an active research topic. Extensive study has been focused on the AND-OR parallel execution of a logic program. Current approaches adopt a top-down evaluation sequence to realize AND-OR parallelism by exploring parallelly executable predicates from root to leaf and then collect bindings generated in this process. Our research presented in this paper explores the parallel execution of a logic program based on a new data flow analysis algorithm. A logic program is first applied by data dependency analysis which can find all mode combinations possibly existing within a logic clause. This mode information is used to support a novel hybrid parallel execution model, which combines both top-down and bottom-up evaluation strategies. By adopting this model, various improvements can be achieved. The results generated from a simulator demonstrate very encouraging results

Published in:

Parallel and Distributed Processing, 1994. Proceedings. Sixth IEEE Symposium on

Date of Conference:

26-29 Oct 1994