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A compiler-directed cache coherence scheme with improved intertask locality

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2 Author(s)
Choi, L. ; Center for Supercomput. Res. & Dev., Illinois Univ., Urbana, IL, USA ; Pen-Chung Yew

We introduce a compiler directed coherence scheme which can exploit most of the temporal and spatial locality across task boundaries. It requires only an extended tag field per cache word, one modified memory access instruction, and a counter called the epoch counter in each processor. By using the epoch counter as a system wide version number, the scheme simplifies the cache hardware of previous version control (Hoichi Cheong and A.V. Veidenbaum, 1989) or timestamp based schemes (S.L. Min and J.-L. Baer, 1989), but still exploits most of the temporal and spatial locality across task boundaries. We present a compiler algorithm to generate the appropriate memory access instructions for the proposed scheme. The algorithm is based on a data flow analysis technique. It identifies potential stale references by examining memory reference patterns in a source program

Published in:
Supercomputing '94., Proceedings

Date of Conference: 14-18 Nov 1994

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