By Topic

Precise visual inspection for LSI wafer patterns using subpixel image alignment

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
T. Hiroi ; Production Eng. Res. Lab., Hitachi Ltd., Yokohama, Japan ; S. Maeda ; H. Kubota ; K. Watanabe
more authors

This paper reports on an image processing algorithm and hardware for fast, precise inspection of LSI wafer patterns. In order to detect deep sub-micron defects such as 0.2 μm at high speed by grayscale image comparison, we must overcome the sampling errors that inevitably occur between two images during detection. For this purpose, we have developed a subpixel image alignment algorithm that infers the correct sampling position and creates the two resampled images with subpixel accuracy. We have also developed an 8-channel pipelined processor with gate arrays. It has 8×19,000 gates and can operate at 8×15 MHz. Evaluation of the system confirmed that the accuracy of the subpixel image alignment was 0.16 pixels or less and that the inspection system could detect 0.18 μm defects at a pixel size of 0.25 μm for half-micron LSI wafer patterns with an inspection speed of 25 s/cm2

Published in:

Applications of Computer Vision, 1994., Proceedings of the Second IEEE Workshop on

Date of Conference:

5-7 Dec 1994