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A methodology for the identification of worst-case test vectors for logical faults induced in CMOS circuits by total dose

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3 Author(s)
Abou-Auf, A.A. ; US Army Res.Lab., Adelphi, MD, USA ; Barbe, D.F. ; Eisen, H.A.

A new methodology was developed for the identification of the worst-case combination of irradiation and postirradiation test vectors. The methodology significantly simplifies total-dose testing of CMOS VLSI devices. It also provides more accurate assessment of failure levels for such devices.<>

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Nuclear Science, IEEE Transactions on  (Volume:41 ,  Issue: 6 )