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An 8 GHz silicon bipolar clock-recovery and data-regenerator IC

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2 Author(s)
A. Pottbaker ; Ruhr-Univ., Bochum, Germany ; U. Langmann

A silicon bipolar IC for data regeneration and clock recovery which includes a phase/frequency detector (PFD), a quadrature voltage controlled oscillator (VCO), and an MS D-flipflop (DFF) is presented. The VCO is based on a modified two stage ring oscillator approach and presents a wide tuning range of 2-to-9 GHz. Data regeneration at 8 Gb/s (with the onchip VCO) and PFD operation up to 15 Gb/s (with an external VCO) are demonstrated. The IC for clock and data regeneration was fabricated with a 25 GHz fT 0.4 μm emitter width bipolar process. The power dissipation is 2.25 W

Published in:

IEEE Journal of Solid-State Circuits  (Volume:29 ,  Issue: 12 )