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Submicron silicon bipolar master-slave D-type flip-flop for use as 8.1 Gbit/s decision circuit and 11.2 Gbit/s demultiplexer

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7 Author(s)
Runge, K. ; Bellcore, Red Bank, NJ, USA ; Gimlett, J.L. ; Clawin, D. ; Way, W.
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The authors have designed and implemented a submicron silicon bipolar master-slave D-type flip-flop integrated circuit which can be used either as a decision circuit or a demultiplexer, operating at data rates as high as 8.1 and 11.2 Gbit/s, respectively. The circuit was fabricated using a 0.6 mu m, nonpolysilicon emitter technology, occupying an area of 0.8 mm*0.9 mm, and dissipating 410 mW of power.

Published in:

Electronics Letters  (Volume:25 ,  Issue: 20 )