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A bare-chip probe for high I/O, high speed testing

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3 Author(s)
Barber, A. ; Hewlett-Packard Lab., Palo Alto, CA, USA ; Lee, K. ; Obermaier, H.

The authors describe a bare chip probing fixture for temporary interconnection of a VLSI tester to a die. It is capable of connecting to an area array of die pads, can operate beyond 1 GHz, and is extensible to 1000 signal I/O's. This probe has been adapted to an existing VLSI tester by attaching it to a custom DUT board and has been used to test operational silicon. The fixture consists of a four metal layer membrane probe which is an enhancement to a previously described burn-in fixture with a novel alignment scheme and no-wipe contacting buttons. The probe is electrically connected to the DUT PCB with an array of button connections, and board I/O is through coaxial cables to the tester. A mechanical structure provides alignment of the PCB, button connector, and membrane probe while providing controlled pressure between the membrane and die, and at the same time cooling the die. The authors describe the electrical performance of the interconnect and the results of testing a circuit toggling at up to 1 GHz, compare them with another probing solution and describe future improvements contemplated. In addition, they briefly describe the potential for use as a very fast bare chip burn-in fixture

Published in:

Components, Packaging, and Manufacturing Technology, Part B: Advanced Packaging, IEEE Transactions on  (Volume:17 ,  Issue: 4 )