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Fault-tolerant dynamic multilevel storage in analog VLSI

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2 Author(s)
Cauwenberghs, G. ; Dept. of Electr. & Comput. Eng., Johns Hopkins Univ., Baltimore, MD, USA ; Yariv, A.

We present an area-efficient dynamic storage technique for repetitively quantizing and refreshing the analog contents of volatile capacitive memories in VLSI, incorporating redundancy and statistical averaging to avoid sudden loss of information triggered by occasional errors in the quantization. Experimental results obtained from a CMOS implementation are included, validating the robustness of the refresh scheme for long-term analog storage in excess of 8 bit resolution

Published in:

Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on  (Volume:41 ,  Issue: 12 )

Date of Publication:

Dec 1994

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