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A memory participative architecture for high performance communication systems

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2 Author(s)
A. Asthana ; AT&T Bell Labs., Murray Hill, NJ, USA ; P. Krzyanowski

The authors define memory participative architecture as one in which the memory is not just a passive repository of data, but actively participates in completing a computation along with the CPU. They describe such a system based on an intelligent memory called SWIM, designed for efficient storage and manipulation of data structures. The key architectural idea in SWIM is to put some processing logic inside each memory chip that allows it to perform data manipulation operations locally and to communicate directly with a disk or communication line. A complex communication task can be distributed between a large number of small memory processors each doing a sub-task, while still retaining a common locus of control for operation, administration and maintenance functions. This enables more powerful, scalable and robust designs for communications subsystems that can support emerging network services, multimedia workstations and wireless PCS systems

Published in:

INFOCOM '94. Networking for Global Communications., 13th Proceedings IEEE

Date of Conference:

12-16 Jun 1994